CPU Architecture

Components of a CPU:
Based upon the Von-Neuman machine-stored program approach. Where both the data and the programs are stored in the main memory



The Fetch- Decode- Execute cycle:

Fetch - The next instruction is fetched from main memory
Decode- The instruction gets decoded and signals produced to control other components such as the ALU
Execute - The instruction gets executed (carried out)

Registers:
A register is a small block of memory usually around 8 bytes which is used as temporary storage for instructions as they are being processed, these will run at the same speed as the processor. Machine code instructions can only work if they are loaded into registers.

General purpose register are used as programs run to enable calculations to be made or can be used for any purpose the programmer requires. Special purpose registers are crucial to how the processor works. The number of these registers in a CPU varies depending on the architecture.
The most important of these are:

• Program counter- This holds the address of the next instruction to be fetched decoded and executed. It's value will be automatically incremented by 1 as the current instruction is being decoded. If a branch command is used the program counter will not be incremented by 1 as these commands are used to create loops.
• Memory address register- This holds of address of the current instruction that is to be executed. It points to the relevant location in memory where the required instruction is. This value is simply copied from the program counter.
• Memory data register- This can hold both instructions and data. At this stage the instruction has been fetched and is being stored here. The instruction is copied from the memory location pointed to by the memory address register. e.g.. LDA 103
• Current address register-
  This is used to store the current instruction that is to be decoded and executed, and is copied from the MDR. As this instruction is being executed, the next instruction is being fetched into the MDR. e.g. LDA 103. As this is being decoded, as soon as it is being decoded the program counter is increased/incremented. The example instruction
  is telling the processor to load the value in the memory address 103 into the accumulator.
• Accumulator- is used by instructions that require a calculation and may update or use the value in the accumulator. For example adding two values will make use of the accumulator. Results of calculations in the accumulator may be used as part of the next calculation.

The Control Unit:
The control unit is in control.
It coordinates all of the fetch decode execute activities. At each clock pulse, it will control the movement of data and instructions between main memory and the CPU etc. Some instructions may take less time than a single clock cycle but the next instruction will only start when the processor executes the next clock cycle.

The Status Register (SR):
Stores a combination of bits to indicate the result of an instruction. For example an overflow error which will be set the value of a bit to indicate a negative result. It also indicates whether an interrupt has been received.

The Arithmetic Logic Unit:
The Arithmetic Logic Unit carried out comparisons or mathematical operations required by an instruction that is executed. Calculations include floating point multiplication and integer division while logic operations include comparison tests such as greater than or less than required by instructions that are executed.